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rev. 1.0 11/11 copyright ? 2011 by silicon laboratories si4820/24-a10 si4820/24-a10 b roadcast m echanical t uning am/fm/sw r adio r eceiver features applications description the si4820/24-a10 is the entry level mechanical-tuned digital cmos am/fm/sw radio receiver ic that int egrates the complete receiver function from antenna input to audio output. the si482 0/24-a10 extends silicon la boratories multi-band tuner family, and further increases the ease and attractiveness of design radio reception to audio devices through small size and board area, minimum component count, and superior, proven performance. the si4820/24-a10 is drop-in replaceable to the existing si4831/35 tuner, requires a si mple application circuit, and removes any requirements for manually tuning components during the manufacturing process. it is a very simple product to design, manufacture, and support across multiple product lines. the receiver has very low power consumption, runs off two aaa batteries, and deliv ers the performance benefits of digital tuning to the analog radio market. functional block diagram ? worldwide fm band support (64?109 mhz) ? worldwide am band support (504?1750 khz) ? sw band support (si4824 only) (5.6?22 mhz) ? no manual alignment necessary ? mono audio output ? selectable support am/fm/sw regional bands ? automatic frequency control (afc) ? integrated ldo regulator ? 2.0 to 3.6 v supply voltage ? wide range of ferrite loop sticks and air loop antennas supported ? 24-pin ssop ? rohs-compliant ? direct volume control ? not en55020 compliant* *note: for consumer applications that require en 55020 compliance, use si4831/35-b. ? table and portable radios ? mini/micro systems ? cd/dvd players ? boom boxes ? modules ? clock radios ? mini hifi ? entertainment systems si4830/34 adc adc dsp dac aout afc si4820/24 rfgnd lna ami agc reg vdd1/2 2.0~3.6v xtal osc fmi 0/90 am ant fm ant control interface tune1/2 band xtali rst adc lna_en this product, its features, and/or its architecture is covered by one or more of the following patents, as well as other patents, pending and issued, both foreign and domestic: 7,127,217; 7,272,373; 7,27 2,375; 7,321,324; 7,355,476; 7,42 6,376; 7,471,940; 7,339,503; 7,339,504. ordering information: see page 14. pin assignments si4820/24-a10 (ssop) nc fmi rfgnd ami band tune2 tune1 nc nc nc rst aout nc dbyp vdd2 vol- vol+ xtalo xtali vdd1 gnd gnd 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 lna_en nc
si4820/24-a10 2 rev. 1.0
si4820/24-a10 rev. 1.0 3 t able of c ontents section page 1. electrical specificat ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3. bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4. functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.1. overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.2. fm receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3. am receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4. sw receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 4.5. frequency tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6. band select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 4.7. volume control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5. pin descriptions: si4820/24-a10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6. ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7. package outline: si4820/ 24-a10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8. pcb land pattern: si4820/24-a 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9. top markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 9.1. si4820/24-a10 top markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9.2. top marking explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 10. additional reference resour ces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 contact information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
si4820/24-a10 4 rev. 1.0 1. electrical specifications table 1. recommended operating conditions 1,2 parameter symbol test condition min typ max unit supply voltage 3 v dd 2?3.6v power supply powe rup rise time v ddrise 10 ? ? s note: 1. typical values in the data sheet apply at v dd = 3.3 v and 25 c unless otherwise stated. 2. all minimum and maximum specifications in the data s heet apply across the recommended operating conditions for minimum v dd = 2.7 v. 3. operation at minimum v dd is guaranteed by characterization when v dd voltage is ramped down to 2.0 v. part initialization may become unresponsive below 2.3 v. table 2. dc characteristics (v dd = 2.7 to 3.6 v, t a = 0 to 70 c) parameter symbol test condition min typ max unit fm mode supply current * i fm ?21.0?ma am/sw mode supply current * i am ?17.0?ma supplies and interface v dd powerdown current i ddpd ?10? a *note: specifications are guaran teed by characterization.
si4820/24-a10 rev. 1.0 5 figure 1. reset timing table 3. reset timing characteristics (v dd = 2.7 to 3.6 v, ta = 0 to 70 c) parameter symbol min typ max unit rst pulse width t srst 100 ? ? s 30% t srst rst 70%
si4820/24-a10 6 rev. 1.0 table 4. fm receiver characteristics 1,2 (v dd = 2.7 to 3.6 v, ta = 0 to 70 c) parameter symbol test condition min typ max unit input frequency f rf 64 ? 109 mhz sensitivity with headphone network 3 (s+n)/n = 26 db ? 4.0 ? v emf lna input resistance 4,5 ?4? k ? lna input capacitance 4,5 ?5? pf am suppression 4,5,6,7 m = 0.3 ? 50 ? db input ip3 4,8 ? 105 ? dbv emf adjacent channel selectivity 4 200 khz ? 45 ? db alternate channel selectivity 4 400 khz ? 60 ? db audio output voltage 5,6,7 ?72?mv rms audio mono s/n 5,6,7,9,10 ?45? db audio frequency response low ?3 db ? ? 30 hz audio frequency response high ?3 db 15 ? ? khz audio thd 6,5,11 ?0.10.5 % audio output load resistance 4,10 r l single-ended 10 ? ? k ? audio output load capacitance 4,10 c l single-ended ? ? 50 pf powerup/band switch time 4 ??110 ms notes: 1. additional testing information is available in ?an569: si4831/35/20/24-dem o board test procedure.? volume = maximum for all tests. tested at rf = 98.1 mhz. 2. to ensure proper operation and receiver performance, follow the guidelines in ?an555: si483x-b/si4820/24 antenna, schematic, layout, and design guidelines.? silicon l aboratories will evaluate schematics and layouts for qualified customers. 3. frequency is 64~109 mhz. 4. guaranteed by characterization. 5. v emf =1 mv. 6. f mod = 1 khz, mono, and l = r unless noted otherwise. 7. ? f = 22.5 khz. 8. |f 2 ? f 1 | > 2 mhz, f 0 =2xf 1 ? f 2 . 9. b af = 300 hz to 15 khz, a-weighted. 10. at a out pin. 11. ? f = 75 khz.
si4820/24-a10 rev. 1.0 7 table 5. am/sw receiver characteristics 1, 2 (v dd = 2.7 to 3.6 v, ta = 0 to 70 c) parameter symbol test condition min typ max unit input frequency f rf medium wave (am) 504 ? 1750 khz short wave (sw) 5.60 ? 22.0 mhz sensitivity 3,4,5 (s+n)/n = 26 db ? 30 ? v emf large signal voltage handling 5 thd < 8% ? 300 ? mv rms power supply rejection ratio 5 ? v dd =100 mv rms , 100 hz ? 40 ? db audio output voltage 3,6 ? 54 ? mv rms audio s/n 3,4,6 ? 45 ? db audio thd 3,6 ? 0.1 ? % antenna inductance 5,7 180 ? 450 h powerup/band switch time 5 from powerdown ? ? 110 ms notes: 1. additional testing information is available in ?an 569: si4831/35/20/24-demo board test procedure.? volume = maximum for all tests. tested at rf = 520 khz. 2. to ensure proper operation and receiv er performance, follow the guidelines in ?an555: si483x-b/si4820/24 antenna, schematic, layout, and design guidelines.? silicon laborato ries will evaluate schematics and layouts for qualified customers. 3. fmod = 1 khz, 30% modulation, 2 khz channel filter. 4. b af = 300 hz to 15 khz, a-weighted. 5. guaranteed by characterization. 6. v in =5mvrms. 7. stray capacitance on antenna and board must be < 10 pf to achieve full tuning range at higher inductance levels. table 6. reference clock and crystal characteristics (v dd = 2.7 to 3.6 v, t a = 0 to 70 c) parameter symbol test condition min typ max unit reference clock xtali supported reference clock frequencies ? 32.768 ? khz reference clock frequency tolerance for xtali ?100 ? 100 ppm crystal oscillator crystal oscillator frequency ? 32.768 ? khz crystal frequency tolerance ?100 ? 100 ppm board capacitance ??3.5pf
si4820/24-a10 8 rev. 1.0 table 7. thermal conditions parameter symbol min typ max unit thermal resistance* ? ja ?80?c/w ambient temperature t a 02570c junction temperature t j ??77c *note: thermal resistance assumes a multi-layer pcb with the exposed pad soldered to a topside pcb pad. table 8. absolute maximum ratings 1,2 parameter symbol value unit supply voltage v dd ?0.5 to 5.8 v input current 3 i in 10 ma operating temperature t op ?40 to 95 ? c storage temperature t stg ?55 to 150 ? c rf input level 4 0.4 v pk notes: 1. permanent device damage may occur if the above absolu te maximum ratings are exceeded. functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. the si4820/24-a10 devices are high-perform ance rf integrated circuits with certain pins having an esd rating of < 2 kv hbm. handling and assembly of these devices should only be done at esd-protected workstations. 3. for input pins rst , vol+, vol?, xtalo, xtali, band, tune2, tune1, lna_en. 4. at rf input pins, fmi and ami.
si4820/24-a10 rev. 1.0 9 2. typical application schematic notes: 1. place c 4 close to v dd2 and dbyp pins. 2. all grounds connect directly to gnd plane on pcb. 3. pin 6, pin 7, and pin 23 leave floating. 4. to ensure proper operation and receiver performance, follow the guidelines in "an555: si483x-b/si4820/24 antenna, schematic, layout, and design guidelines." silicon labs will evaluate the schematics and layouts for qualified customers. 5. pin 8 connects to the fm antenna interface and pin 12 connects to the am antenna interface. 6. place si4820/24 as close as possible to antenna jack and keep the fmi and ami traces as short as possible. 7. recommend keeping the am ferrite loop antenna at least 5 cm away from the tuner chip. 8. keep the am ferrite loop antenna at least 5 cm away fr om mcu, audio amp, and other circuits which have am interference. 9. place the transformer t1 away from any sources of interf erence and even away from the i/o signals of the si4820/24. 5 rfgnd optional: am air loop antenna 2.0 to 3.6v 2.0 to 3.6v optional 2.5k/100m fm am ba nd sw y1 32.768khz c2 22p c3 22p 1 lna_en 2 nc 3 tune1 4 tune2 5 ba nd 6 nc 7 nc 8 fmi 9 rfgnd 10 nc 11 nc 12 ami 13 gnd 14 gnd 15 rst 16 vol+ 17 vol- 18 xtal0 19 xtali 20 vdd1 21 vdd2 22 dbyp 23 nc 24 aout u1 c5 0.47u ant1 am antenna ant2 t1 c 0.47u c4 0.1u c1 0.1u r1 100k vr1 100k b1 12 3 4 s2 r3 143k r4 180k r5 67k r6 110k vdd fmi aout ami ami vdd vdd ba nd tune1 tune1
si4820/24-a10 10 rev. 1.0 3. bill of materials table 9. si4820/24-a bill of materials component(s) value/description supplier c1 reset capacitor 0.1 f, 20%, z5u/x7r murata c4 supply bypass capacitor, 0.1 f, 20%, z5u/x7r murata c5 coupling capacitor, 0.47 f, 20%, z5u/x7r murata b1 ferrite bead 2.5 k/100 mhz murata vr1 variable resistor (pot), 100 k, 10% kennon r1 reset timing resistor, 100 k, 5% venkel r3 resistor, 143 k, 1%, venkel r4 resistor, 180 k, 1% venkel r5 resistor, 67 k, 1% venkel r6 resistor,110 k, 1% venkel u1 si4820/24-a am/fm/sw analog tune analog display radio tuner silicon laboratories s2 band switch any, depends on customer ant1 ferrite stick,180-450 h jiaxin optional components c2, c3 crystal load capa citors, 22 pf, 5%, cog (optional: for crystal oscillator option) venkel y1 32.768 khz crystal (optional: for crystal oscillator option) epson or equivalent ant2 air loop antenna, 10-20 h various
si4820/24-a10 rev. 1.0 11 4. functional description figure 2. si4820/24-a10 functional block diagram 4.1. overview the si4820/24-a10 is the entry level mechanical-tuned digital cmos am/fm/sw radio receiver ic that integrates the complete receiver function from antenna input to audio output. the si4820/24-a10 extends silicon laboratories multi-band tuner fa mily, and further increases the ease and attractiveness of design radio reception to audio devices through small size and board area, minimum component count, and superior, proven performance. the si4820/24-a10 is drop-in replaceable to the existing si4831/35 tuner, requires a simple application circuit, and removes any requirements for manually tuning components during the manufacturing process. it is a very simple product to design, manufacture, and support across multiple product lines. leveraging silicon laborator ies' proven and patented digital low intermediate frequency (low-if) receiver architecture, the si4820/24-a10 delivers desired rf performance and interference rejection in am, fm, and sw bands. the high integration and complete system production test simplifies design-in, increases system quality, and improv es manufacturability. 4.2. fm receiver the si4820/24-a10 integrat es a low noise amplifier (lna) supporting the worldwide fm broadcast band (64 to 109 mhz). pre-emphasis and de-emphasis is a technique used by fm broadcasters to improve the signal-to-noise ratio of fm receivers by reducing the effects of high frequency interference and noise. when the fm signal is transmitted, a pre-emphasis filter is applied to accentuate the high audio frequencies. all fm receivers incorporate a de-emphasis filter which attenuates high frequencies to restore a flat frequency response. two time constants are used in various regions. the de- emphasis time constant can be chosen to be 50 or 75 s. si4830/34 adc adc dsp dac aout afc si4820/24 rfgnd lna ami agc reg vdd1/2 2.0~3.6v xtal osc fmi 0/90 am ant fm ant control interface tune1/2 band xtali rst adc lna_en
si4820/24-a10 12 rev. 1.0 4.3. am receiver the highly integrated si4820/24-a10 supports worldwide am band reception from 504 to 1750 khz with five sub-bands using a digital low-if architecture with a minimum number of external components and no manual alignment required. this patented architecture allows for high-precision f iltering, offering excellent selectivity and snr with minimum variation across the am band. similar to the fm receiver, the si4820/24-a10 optimizes sensitivity and reje ction of strong interferers, allowing better reception of weak stations. to offer maximum flexibility, the receiver supports a wide range of ferrite loop sticks from 180?450 h. an air loop antenna is supported by using a transformer to increase the effective inductance from the air loop. using a 1:5 turn ratio inductor, the inductance is increased by 25 times and easily supports all typical am air loop antennas, which generally vary between 10 and 20 h. 4.4. sw receiver the si4824 supports 16 short wave (sw) band receptions from 5.60 to 22.0 mhz. si4824 supports extensive short wave features such as minimal discrete components and no factory adjustments. the si4824 supports using the fm antenna to capture short wave signals. 4.5. frequency tuning a valid channel can be found by tuning the potentiometer that is co nnected to the tune1 and tune2 pin of the si4820/24-a10 chip. to offer easy tuning, the si 4820/24-a10 also supports a station led light. it will light up the led if the rf signal quality passes the led sensit ivity threshold when tuned to a valid station. 4.6. band select the si4820/24-a10 supports worldwide am band with five sub-bands, us/europe/japan/china fm band with five sub-bands, and sw band with 16 sub-bands. for details on band selection, refer to ?an555: si483x- b/si4820/24 antenna, schem atic, layout, and design guidelines." 4.7. volume control the si4820/24-a10 not only allows customers to use the traditional pvr wheel volume control through an external speaker amplifier, it also supports direct digital volume control through pins 16 and pin 17 by using volume up and down buttons. refer to "an555: si483x- b/si4820/24 antenna, schem atic, layout, and design guidelines."
si4820/24-a10 rev. 1.0 13 5. pin descriptions: si4820/24-a10 pin number(s) name description 1 lna_en enable sw external lna for si4824 2 nc no connect 3 tune1 frequency tuning 4 tune2 frequency tuning 5 band band selection and de-emphasis selection 6,7 nc no connect. leave floating. 8 fmi fm rf inputs. fmi should be connected to the antenna trace. 9 rfgnd rf ground. connect to ground plane on pcb. 10,11 nc unused. tie these pins to gnd. 12 ami am rf input. ami should be connected to the am antenna. 13,14 gnd ground. connect to ground plane on pcb. 15 rst device reset (act ive low) input 16 vol+ volume button up 17 vol? volume button down 18 xtalo crystal oscillator output 19 xtali crystal oscillator input 20 vdd1 supply voltage. may be c onnected directly to battery. 21 vdd2 supply voltage. may be c onnected directly to battery. 22 dbyp dedicated bypass for vdd 23 nc no connect. leave floating 24 aout audio output nc fmi rfgnd ami band tune2 tune1 nc nc nc rst aout nc dbyp vdd2 vol- vol+ xtalo xtali vdd1 gnd gnd 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 lna_en nc
si4820/24-a10 14 rev. 1.0 6. ordering guide part number 1,2 description package type operating temperature/voltage si4820-a10-cu am/fm broadcast radio receiver 24l ssop pb-free 0 to 70 c 2.0 to 3.6 v SI4824-A10-cu am/fm/sw broadcast radio receiver 24l ssop pb-free 0 to 70 c 2.0 to 3.6 v notes: 1. add an ?(r)? at the end of the device part number to denote tape and reel option. the devices will typically operate at 25 c with degraded specifications for v dd voltage ramped down to 2.0 v. 2. the -c suffix in the part number indicates consumer grade product. please visit www.silabs.com to get more information on product grade specifications.
si4820/24-a10 rev. 1.0 15 7. package outl ine: si4820/24-a10 the 24-pin ssop illustrates the package details for the si4820/24- a10. table 10 lists the values for the dimensions shown in the illustration. figure 3. 24-pin ssop table 10. package dimensions dimension min nom max a??1.75 a1 0.10 ? 0.25 b0.20?0.30 c0.10?0.25 d 8.65 bsc e 6.00 bsc e1 3.90 bsc e 0.635 bsc l0.40?1.27 0 ? 8 aaa 0.20 bbb 0.18 ccc 0.10 ddd 0.10 notes: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. this drawing conforms to the jedec so lid state outline mo-137, variation ae. 4. recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components.
si4820/24-a10 16 rev. 1.0 8. pcb land pa ttern: si4820/24-a10 figure 4, ?pcb land pattern,? illustra tes the pcb land pattern details fo r the si4820/24-a10-cu ssop. table 11 lists the values for the dimens ions shown in the illustration. figure 4. pcb land pattern table 11. pcb land pattern dimensions dimension min max c5.205.40 e 0.635 bsc x1 0.35 0.45 y1 1.55 1.75 general: 1. all dimensions shown are in millimeters (mm) unless otherwise noted. 2. this land pattern design is based on the ipc-7351 guidelines. solder mask design: 3. all metal pads are to be non-solder mask defined (nsmd). clearance between the solder mask and the metal pad is to be 60 m minimum, all the way around the pad. stencil design: 4. a stainless steel, laser-cut, and electr o-polished stencil with trapezoidal walls should be used to assure good solder paste release. 5. the stencil thickness should be 0.125 mm (5 mils). 6. the ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads. card assembly: 7. a no-clean, type-3 solder paste is recommended. 8. the recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components.
si4820/24-a10 rev. 1.0 17 9. top marking 9.1. si4820/24-a10 top marking 9.2. top marking explanation mark method: yag laser line 1 marking: device identifier 4820a10cu = si4820-a10 4824a10cu = SI4824-A10 line 2 marking: yy = year ww = work week tttttt = manufacturing code assigned by the assembly house. 4820a10cu yywwtttttt 4824a10cu yywwtttttt
si4820/24-a10 18 rev. 1.0 10. additional reference resources contact your local sales representative s for more information or to obtain copies of the following references: ? an555: si483x-b/si4820/24 antenna, sc hematic, layout, and design guidelines ? an569: si4831/35/20/24-demo board test procedure ? si4820/24-demo board user?s guide
si4820/24-a10 rev. 1.0 19 n otes :
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